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PLAGA: A highly parallelizable genetic algorithm for programmable logic arrays test pattern generation

Research output: Contribution to conference › Paper › peer-review

Abstract

An evolutionary algorithm (EA) approach is used to generate test vectors for the detection of shrinkage faults in programmable logic arrays (PLA). Three basic steps are performed during the generation of the test vectors: crossover, mutation and selection. A new mutation operator is introduced that helps increase the Hamming distance among the candidate solutions. Once crossover and mutation have occurred, the new candidate test vectors with higher fitness function scores replace the old ones. With this scheme, population members steadily improve their fitness level with each new generation. The resulting process yields improved solutions to the problem of the PLA test vector generation for shrinkage faults. PLA testing and fault simulation is computationally prohibitive in uniprocessor machines. However, PLAGA is well suited for powerful parallel processing machines with vectorization capability,.

Original languageEnglish
Pages944-951
Number of pages8
DOIs
StatePublished - 1999
Event1999 Congress on Evolutionary Computation, CEC 1999 - Washington, DC, United States
Duration: Jul 6 1999 → Jul 9 1999

Conference

Conference1999 Congress on Evolutionary Computation, CEC 1999
Country/TerritoryUnited States
CityWashington, DC
Period7/6/99 → 7/9/99

ASJC Scopus Subject Areas

  • Computational Mathematics

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